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EUA6204A ds6204a ver 1.2 jan. 2007 1 3w mono fully differential audio power amplifier description the EUA6204A is a mono fully-differential audio amplifier, capable of delivering 3w of continuous average power to an 3 ? btl load with less than 10% distortion (thd+n) from a 5v power supply, and 720mw to a 8 ? load from a 3.6v power supply. the EUA6204A is ideal for pda/notebook and portable devices application due to features such as -80-db supply voltage rejection from 20ha to 2khz, improved rf rectification immunity, and a fast startup with minimal pop. the EUA6204A is availa ble in a sop-8(fd). typical application circuit features z supply voltage 2.5v to 5.5v z 2.3w into 3 ? from a 5-v supply at thd=1% (typ) 3w into 3 ? at thd=10% z low supply current: 4ma typ at 5v z shutdown current: 0.01a typ z fast startup with minimal pop z only three external components - improved psrr (-80db) for direct battery operation - full differential design reduces rf rectification - -63db cmrr eliminates two input coupling capacitors z rohs compliant and 100% lead (pb)-free applications z pdas z portable devices z notebook www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 2 block diagram pin configurations package pin configurations plastic sop-8(fd) ? ? thermal pad pin description symbol pin description shutdown 1 shutdown terminal bypass 2 mid-supply voltage, adding a bypass capacitor improves psrr in+ 3 positive differential input in- 4 negative differential input vo+ 5 positive btl output vdd 6 power supply gnd 7 high-current ground vo- 8 negative btl output www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 3 ordering information order number package type markin g operating temperature range EUA6204Adir1 sop-8 xxxx eua6204 a -40c to 85c EUA6204A ?? ?? ?? ?? lead free code 1: lead free 0: lead packing r: tape & reel operating temperature range i: industry standard package type d: sop www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 4 absolute maximum ratings t supply voltage, v dd -------------------------------------------------------------------------------------------- 6v t input voltage, v i ---------------------------------------------------------------------------- -0.3 v to v dd +0.3v t storage temperature rang, t stg ------------------------------------------------------------------- -65c to 150c t esd susceptibility ------------ ------------ ------------ ------------ ------------ ------------ ---------- ---------- 2kv t junction temperature ---------------------------------------------------------------------------------------- 150c t thermal resistance ja (sop-8) ------------------------------------------------------------------------------------------------- 42.3c/w recommended operating conditions min nom max unit supply voltage, v dd 2.5 5.5 v high-level input voltage, v ih 1.55 v low-level input voltage, v il 0.5 operating free-air temperature, t a -40 85 c electrical characteristics, t a =25c EUA6204A symbol parameter conditions min t yp max. unit v os output offset voltage (measured differentially) v i =0v differential, gain=1v/v, v dd =5.5v -9 2 9 mv psrr power supply rejection ratio v dd =2.5v to 5.5v -85 -60 db v ic common mode input range v dd =2.5v to 5.5v 0.5 v dd -0.8 v v dd =2.5v, v ic =0.5v to 1.7v -63 -40 cmrr common mode rejection range v dd =5.5v, v ic =0.5v to 4.7v -63 -40 db v dd =5.5v 0.45 v dd =3.6v 0.37 low-output swing r l =8 ? , gain=1v/v v in+ =v dd , v in -=0v or v in+ =0v, v in -=v dd v dd =2.5v 0.26 0.4 v v dd =5.5v 4.95 v dd =3.6v 3.18 high-output swing r l =8 ? , gain=1v/v v in+ =v dd , v in -=0v or v in- =v dd , v in +=0v v dd =2.5v 2 2.13 v |i ih | high-level input current, shutdown v dd =5.5v, v i =5.8v 58 100 a |i il | low-level input current, shutdown v dd =5.5v, v i =-0.3v 3 100 a i q quiescent current v dd =2.5v to 5.5v, no load 4 8 ma i (sd) supply current v( shutdown ) 0.5v, v dd =2.5v to 5.5v, r l = 8 ? 0.01 1 a gain r l = 8 ? 38k ? ri 40k ? ri 42k ? ri v/v resistance from shutdown to gnd 100 k ? www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 5 operating characteristics, t a =25c, gain=1v/v EUA6204A symbol parameter conditions min typ max. unit r l =3 ? 2.3 r l =4 ? 2.1 thd+n=1%, f=1khz,v dd =5v r l =8 ? 1.36 w r l =3 ? 3 r l =4 ? 2.6 p o output power thd+n=10%,f=1khz,v dd =5v r l =8 ? 1.7 w v dd =5v, p o =1w, r l =8 ? , f=1khz 0.15 v dd =3.6v, p o =0.5w, r l =8 ? , f=1khz 0.1 thd+n total harmonic distortion plus noise v dd =2.5v, p o =200mw, r l =8 ? , f=1khz 0.1 % f = 217hz -77 k svr supply ripple rejection ratio v dd =3.6v, inputs ac-grounded with c i =2f, v (ripple) =200mvpp f=20hz to 20khz -60 db snr signal-to-noise ratio v dd =5v, p o =1w, r l =8 ? 100 db no wei g htin g 25 vn output voltage noise v dd =3.6v, f=20hz to 20khz, inputs ac-grounded with c i =2f a wei g htin g 19 v rms cmrr common mode rejection ratio v dd =3.6v v ic =1vpp f=217hz -64 db r f feedback resistance 38 40 44 k ? start-up time from shutdown v dd =3.6v, c bypass =0.1f 27 ms note: 1.when driving 3 ? or 4 ? load from a 5v supply, the EUA6204A must be mounted to a circuit board with thermal pad. www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 6 typical operating characteristics www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 7 www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 8 www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 9 application information application schematics figure17 through figure18 show application schematics for differential and single-ended inputs. typical values are shown in table1. table1. typical component value component value r i 40k ? c (bypass) 0.22f c s 1f c i 0.22f power dissipation power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or single-ended. a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation. since the EUA6204A has two operational amplifiers in one package, the maximum internal power dissipation is 4 times that of a single-ended amplifier. the maximum power dissipation for a given application can be derived from the power dissipation graphs of from equation1. ------------(1) it is critical that the maximum junction temperature t jmax of 150c is not exceeded. t jmax can be determine from the power derating curves by using p dmax and the pc board foil area. by adding additional copper foil, the thermal resistance of the application can be reduced, resulting in higher p dmax. additional copper foil can be added to any of the leads connected to the EUA6204A. if t jmax still exceeds 150c, then additional changes must be made. these changes can include reduced supply voltage, higher load impedance, or reduced ambient temperature. internal power dissipation is a function of output power. proper selection of external components gain-setting resistor selection the input resistor (r i ) can be selected to set the gain of the amplifier according to equation2. gain=r f /r i (2) the internal feed back resistors (r f ) are trimmed to 40k ? . resistor matching is very important in fully differential amplifiers. the balance of the output on the reference voltage depends on matched ratios of the resistors. cmrr, psrr, and the cancellation of the second harmonic distortion diminishes if resistor mismatch occurs. therefore, it is recommended to use 1% tolerance resistors or better to keep the performance optimized. bypass capacitor (c bypass ) and start-up time the internal voltage divider at the bypass pin of this device sets a mid-supply voltage for internal references and sets the output common mode voltage to v dd /2. adding a capacitor to this pin filters any noise into this pin and increases k svr. c (bypass) also determines the rise time of v o+ and v o- when the device is taken out of shutdown. the larger the capacitor, the slower the rise time. show the relationship of c (bypass) to start-up time as figure13. ) r /(2 ) (v * 4 p l dd dmax 2 2 = www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 10 input capacitor (c i ) the EUA6204A does not require input coupling capacitors if using a differential input source that is biased from 0.5v to v dd -0.8v. use 1% tolerance or better gain-setting resistors if not using input coupling capacitors. in the single-ended input application an input capacitor, c i , is required to allow the amplifier to bias the input signal to the proper dc level. in this case, c i and r i form a high-pass filter with the co rner frequency determined in equation3. (3) the value of c i is important to consider as it directly affects the bass (low frequency) performance of the circuit. consider the example where r i is 10k ? and the specification calls for a flat bass response down to 100hz. equation 3 is reconfigured as equation4. (4) in this example, c i is 0.16f, so one would likely choose a value in the range of 0.22f to 0.47f. ceramic capacitors should be used when possible, as they are the best choice in preventing leakage current. when polarized capacitors ar e used, the positive side of the capacitor should face the amplifier input in most applications, as the dc level there is held at v dd /2, which is likely higher than the source dc level. it is important to confirm the capacitor polarity in the application. decoupling capacitor (c s ) the EUA6204A is a high-performance cmos audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (thd) is as low as possible. power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. for higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (esr) ceramic capacitor, typically 0.1f to 1 f, placed as close as possible to the device v dd lead works best. for filtering lower frequency noise signals, a 10-f or greater capacitor placed near the audio power amplifier also helps, but is not required in most applications because of the high psrr of this device. i c i r 2 1 c f = c f i r 2 1 i c = www.datasheet.in
EUA6204A ds6204a ver 1.2 jan. 2007 11 package information sop-8 (fd) millimeters inches symbols min. max. min. max. a 1.35 1.75 0.053 0.069 a1 0.05 0.25 0.002 0.010 d 4.90 0.193 e1 3.90 0.153 e 5.80 6.20 0.228 0.244 l 0.40 1.27 0.016 0.050 b 0.33 0.51 0.013 0.020 e 1.27 0.500 d1 2.06 0.081 e2 2.06 0.081 www.datasheet.in

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